This application claims priority on Japanese Patent Application HEI 11-185627, filed on Jun. 30, 1999, the entire contents of which are incorporated herein by reference.
a) Field of the Invention
The present invention relates to a plasma display panel, and more particularly to a three-electrode type plasma display panel having, on its one substrate, X electrodes as common electrodes and Y electrodes as scan electrodes.
b) Description of the Related Art
A three-electrode type plasma display panel has: a plurality of address electrodes on an opposing surface of one of a pair of substrates; and a plurality pair of retaining electrodes crossing the address electrodes on an opposing surface of the other of the pair of substrates.
Each retaining electrode pair has an X electrode and a Y electrode. The surface of the retaining electrode is covered with a high dielectric layer having a high dielectric constant. Discharge gas such as Ne+Xe at a predetermined pressure is filled in the space between opposing substrates. Fluorescent members of predetermined colors are disposed on the address electrodes.
As a voltage corresponding to an image signal and being higher than a threshold voltage is applied between selected Y and address electrodes, discharge gas in the crossed space between the electrodes starts discharging, and electric charges are stored on the surface of the high dielectric layer. In a similar manner, a voltage corresponding to an image signal is applied between a next selected Y electrode and the address electrode.
After electric charges of one frame are stored, a voltage whose polarities are alternately reversed is applied between X and Y electrodes. Electric charges stored in the upper area of the Y electrode move to the upper area of the X electrode, and next to the upper area of the Y electrode. Electric charges alternately move between the upper areas of X and Y electrodes to retain electric discharge. Ultraviolet rays or the like radiated by electric discharge make the fluorescent member in a corresponding area develop color.
Multi-level gradation display becomes possible by combining radiations of light having different discharge times. If X and Y electrodes of each retaining electrode are made of a wide transparent electrode and a narrow bus electrode having a low resistance, radiation light transmitted through the transparent electrode can be observed externally and the low wiring resistance can achieve a high speed operation.
In order to store electric charges in the upper area of the Y electrode (and X electrode), it is preferable to cover the retaining electrode with a dielectric layer. It is more preferable if the dielectric constant of the dielectric layer is made higher, in order to store electric charges as much as possible. A higher dielectric constant of the dielectric layer is more preferable in order to apply a division voltage, as high as possible, to the space between opposing substrates when a predetermined voltage is applied between the address electrode and Y electrode.
X and Y electrodes of each retaining electrode are disposed near to each other. A parasitic capacitance between X and Y electrodes, therefore, becomes large. Power consumed to charge this parasitic capacitance is a reactive power not contributing to light radiation.
It is an object of the present invention to provide a plasma display panel having a high power efficiency.
It is another object of the present invention to provide a plasma display panel having a small charge current.
It is still another object of the present invention to provide a plasma display panel capable of high speed operation.
According to one aspect of the present invention, there is provided a plasma display panel comprising: first and second substrates disposed facing each other; a plurality of address lines formed on the first substrate and extending along a first direction; a plurality set of X and Y electrodes formed on the second substrate and extending along a second direction crossing the first direction; a high dielectric layer covering the X and Y electrodes formed on the second substrate, the high dielectric layer having a dielectric constant higher than a dielectric constant of the second substrate; and a trench formed at least through the high dielectric layer in an area corresponding to an area between the X and Y electrodes of each set, the trench extending along the second direction.
The high dielectric layer is removed at least in the area corresponding to the area between the X and Y electrodes of each set so that parasitic capacitances of the X and Y electrodes are reduced. A power required for charging the X and Y electrodes is lowered and the power efficiency is improved. The charge current for the same charge time can be reduced and the charge time for the same charge current can be shortened. A high speed operation is made possible.
As the charge storage area is increased to store a large amount of charges, the discharge start voltage can be lowered.
As the discharge space is formed between the X and Y electrodes, a spatial discharge as well as a surface discharge can be generated.
According to another aspect of the present invention, there is provided a plasma display panel comprising: a transparent first substrate; a plurality of address lines formed on the first substrate and extending along a first direction; a second substrate having a plurality of projections extending along a second direction crossing the first direction; a plurality set of X and Y electrodes formed on the second substrate along the projections, each set being formed in both side areas of each projection; and a high dielectric layer covering the X and Y electrodes and formed in both side areas of each projection on the second substrate, the high dielectric layer having a dielectric constant higher than a dielectric constant of the second substrate.
As the dielectric constant between the X and Y electrodes is lowered, the parasitic capacitances of the X and Y electrodes can be reduced. Therefore, a power required for charging the X and Y electrodes is lowered and the power efficiency is improved. The charge current for the same charge time can be reduced and the charge time for the same charge current can be shortened. A high speed operation is possible.
As above, the parasitic capacitances of electrodes of a plasma display panel can be reduced and a low power consumption can be realized.
The charge current can be reduced and the charge time can be shortened. The discharge start voltage is expected to be lowered.